Clock

Generates an actual time signal

Description

The Clock component generates a time signal at the output, $y$, after the time step, ${T}_{0}$, during a simulation. Its equation is

 $y=\left\{\begin{array}{cc}\mathrm{offset}& t<{T}_{0}\\ \mathrm{offset}+t-{T}_{0}& t\ge {T}_{0}\end{array}\right\$

Connections

 Name Description y Real output signal connection

Parameters

 Symbol Default Units Description Modelica ID $\mathrm{offset}$ $0$ - Offset of the output signal offset ${T}_{0}$ $0$ $s$ Time offset startTime