3 Supported Inputs and Outputs on the dSPACE DS1104 board - MapleSim Help

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3 Supported Inputs and Outputs on the dSPACE DS1104 board

This chapter defines the list of supported inputs, outputs, and features of the dSPACE DS1104 board.

More details on each of the inputs, outputs, and features can be found in the dSPACE DS1104 R&D Controller Board Features Guide. You will also find more details on the units and range values of the different configurations parameters in the dSPACE DS1104 Real-Time Application template. Attach this template to a model when you want to export a MapleSim subsystem to a dSPACE application.

3.1 Mux ADC Unit

One A/D converter (ADC1) is multiplexed to four channels (signals ADCH1, ADCH2, ADCH3, and ADCH4).The input signals of the converter are selected by a 4:1 input multiplexer. The A/D converters have the following characteristics:

• 

16-bit resolution

• 

±10 V input voltage range

• 

± 5 mV offset error

• 

± 0.25% gain error

• 

> 80 dB (at 10 kHz) signal-to-noise ratio (SNR)

 

These inputs are used in polling mode.

The end of A/D conversion interrupt and the synchronized start of A/D conversion are not supported.

The application range is the same as the voltage range: -10..10.

3.2 Parallel ADC Converters

Four parallel A/D converters (ADC2, ADC3, ADC4, and ADC5) with one channel each (signals ADCH5, ADCH6, ADCH7, and ADCH8). The A/D converters have the following characteristics:

• 

12-bit resolution

• 

±10 V input voltage range

• 

± 5 mV offset error

• 

± 0.5% gain error

• 

> 70 dB signal-to-noise ratio (SNR)

 

These inputs are used in polling mode.

In case more than one channel is used, all the channels are read at the same time.

The end of A/D conversion interrupt and the synchronized start of A/D conversion are not supported.

The application range is the same as the voltage range: -10..10.

3.3 DAC Unit

The master PPC on the DS1104 controls a D/A converter. It has the following characteristics:

• 

8 parallel DAC channels (signals DACH1, DACH2, DACH3, DACH4, DACH5, DACH6, DACH7, and DACH8)

• 

16-bit resolution

• 

±10 V output voltage range

• 

± 1 mV offset error, 10 μV/K offset drift

• 

± 0.1% gain error, 25 ppm/K gain drift

• 

> 80 dB (at 10 kHz) signal-to-noise ratio (SNR)

• 

Transparent and latched modes

 

The following parameters can be defined independently for each channel:

• 

Initial value

• 

Termination value: hold the last value of the application or termination value specified by the user

 

The synchronized update of the DAC is not supported.

The application range is the same as the voltage range: -10..10.

3.4 Bit I/O Unit

The master PPC on the DS1104 controls a bit I/O unit with the following characteristics:

• 

20-bit digital I/O

• 

Direction selectable for each channel individually

• 

±5 mA maximum output current

• 

TTL voltage range for input and output

 

The following parameters can be defined independently for each channel:

• 

Input or output mode

• 

Initial value

• 

Termination value: hold the last value of the application or termination value specified by the user

3.5 Incremental Encoder Interface

The master PPC on the DS1104 controls an incremental encoder interface. It has the following characteristics:

• 

Input channels for two digital incremental encoders

• 

Support of single-ended TTL and differential RS422 signals

• 

24-bit position counter

• 

1.65 MHz maximum encoder line count frequency

• 

Line termination for differential inputs

• 

Power supply for incremental encoders (5V and 0.1A)

 

The following parameters can be defined independently for each channel:

• 

TTL or RS422 mode

• 

Reset on index mode: true or false

• 

Initial position

 

A line subdivision of 4 is used. This configuration cannot be changed.

The synchronized incremental encoder position strobe is not supported.

3.6 PWM Generation

The slave DSP provides four output channels for 1-phase PWM signal generation.

The PWM mode (asymmetric or symmetric) and the PWM period can be specified globally for the four channels.

The minimum and maximum periods depend on the mode:

• 

Symmetric mode: period between 100 ns and 400 ms

• 

Asymmetric mode: period between 200 ns and 800 ms

 

The following parameters can be defined independently for each channel:

• 

Polarity (active high or active low)

• 

Initial duty cycle

• 

Termination duty cycle: hold the last value of the application or termination value specified by the user

 

Conflicting I/O features

When using D2F channel 4, you cannot generate standard PWM signals.

3.7 3-Phase PWM Generation

The slave DSP provides 3 output channels (phases) for 3-phase PWM signal generation (PWM3) in the frequency range 1.25 Hz .. 5 MHz.

PWM3 signals are centered in the middle of the PWM period (symmetric mode). The polarity of the non-inverted PWM3 signals is active high.

The period and dead band can be specified globally.

 

The following parameters can be defined independently for each channel:

• 

Initial duty cycle

• 

Termination duty cycle: hold the last value of the application or termination value specified by the user

 

The PWM interrupt is not supported.

  Conflicting I/O features

When using 3-phase PWM (PWM3), you cannot generate the D2F square wave signals.

3.8 PWM Capture

The slave DSP provides input channels for the measurement of the duty cycles and PWM periods of up to four PWM signals.

 

Conflicting I/O features

When using the PWM measurement, you cannot perform F2D frequency measurement.

3.9 Square Wave Signal Generation

The slave DSP provides four output channels for square-wave signal generation.

 

The frequency range can be specified globally.

 

The following parameters can be defined independently for each channel:

• 

Initial frequency

• 

Termination duty frequency: hold the last value of the application or termination value specified by the user

 

Conflicting I/O features

• 

When using D2F square wave signal generation, you cannot generate 3-phase PWM.

• 

When using D2F channel 4, you cannot generate standard PWM signals.

3.10 Square Wave Capture

The slave DSP provides input channels for the measurement of the frequencies of up to four square-wave signals.

 

The minimum frequency to be measured can be specified independently for each channel.

 

Conflicting I/O features

When using the F2D frequency measurement, you cannot perform PWM2D measurement.

3.11 Virtual Signals

In order to avoid the use of an external signal generator and to allow the tuning or reference signals directly from ControlDesk, a library of virtual signals that can be generated in real-time is provided. These virtual signals replace inputs and outputs that would typically connect to external signal generators.

 

Virtual Square Signal Generator

Two virtual square signals are provided.

 

The following parameters can be defined independently for each signal:

• 

Amplitude

• 

Frequency

• 

Offset

Virtual Sine Signal Generator

Two virtual sine signals are provided.

 

The following parameters can be defined independently for each signal:

• 

Amplitude

• 

Frequency

• 

Offset

• 

Phase

Virtual Step Signal Generator

Two virtual step signals are provided.

 

The following parameters can be defined independently for each signal:

• 

Amplitude

• 

Offset

• 

Time of step

Virtual Constant Signal Generator

Ten virtual constant signals are provided.

The constant value can be defined independently for each signal.

3.12 Unsupported Features, Inputs, and Outputs

The following features, inputs, and outputs of the dSPACE DS1104 board are not supported:

• 

All the synchronizing I/O features are not supported

• 

Serial Interface

• 

Slave DSP Bit I/O Unit

• 

Space Vector PWM Signal Generation

• 

Slave DSP Serial Peripheral Interface

 

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